2018年1月18日 星期四

Display Serial Interface (DSI) by MIPI

One of the biggest change in mobile technology is higher display resolustion with faster interface. I would like to describe how image content transfer from digital binary to pixel’s crystal. This article is motivated by many discussions with Chun-Hsi, Bowen and Scott.

Overview of Display System

Let’s look inside of a thin-film transistor(TFT) LCD [1] panel:

  • TFTs are subjected to varying voltages to change orientation of molecules in the liquid crystal suspension. This adjust the amount of light allowed to pass through, thereby changing the colour picture.
  • Each unit pixel has a TFT, a pixel electrode (IT0), and a storage capacitor (Cs).
  • Each is individually addressable from the pads at the ends of the rows and columns connecting through the matrix.

The job of display driving IC is to receive digital data from host and control associated timing and voltage of each pixel on matrix TFT panel. Above is all about physical control. Let’s look at how we achieve so fast digital transmission from frame data.

The mobile market, specifically smartphones, has been growing immensely in the past 10 years while MIPI CSI-2 and DSI have been the interfaces of choice to enable multiple cameras and some displays in mobile devices…Both interfaces utilize the same physical layer – MIPI D-PHY – to transmit data to the application processor or SoC.

Taking the Qualcomm S805 as example[2]. Due to 1440x2560x32bppx60fps picture bandwidth, it uses two DSI ports(D-PHY 1.01, 1.0Gbps/lane) with 4 lanes each to drive the display in halves of 720×2560 pixels as this table[3].

DSI Video mode

Video mode refers to transactions taking the form of a real-time pixel stream. The host provides video data, that is, pixel values, and synchronization information, that is, Vsync, Hsync, data enable, and the pixel clock. Please refer to Qualcomm DSI Programming Guide LM80-P0598-2

Let’s see the timing details associated in transmitting the video frame by RGB888 video format in 640×480[4].

Then, we transfer above 2D timing info to serial DSI packet(VSS,HSS,RGB) on one video frame. As packet pixel stream(0x3E) inside a frame, packet is described with “data type”, “word count”, “24bpp” and “CRC. Those bytes of packet data are alignment with 4 DSI Data lines configuration(MIPI D-PHY). For detail, please refer to datasheet of TI SN65DSI84 and STM AN4860

DSI Command mode

Besides video mode of DSI, command mode of DSI is used to send DCS command(0x5) to control display behavior i.e. sleep in/out. There are short and long packet to support command mode and the format is described as follows. For detail, please refer to datasheet of ILITEK ILI9806E
  • Short packet issues DCS sleep in command i.e. 0x05 0x10
  • Long packet issues DCS long write(0x39) 

Touch Disaply Driver Integration(TDDI)

We recognize the format from host to device. Now let’s look it further to TDDI case.
Switching of the crystals in the LCD for display update functions lead to noises on the touch sensing.
Synaptics’ TDsync[5] technology synchronizes their active period, thus avoiding display noise.